A modern CPU is an extraordinary piece of engineering. It can run a web server, compile code, stream video, and handle a spreadsheet calculation, all in the same second. That versatility is exactly the problem. CPUs are designed to do many different things quickly, one or a few at a time. AI training requires doing one specific thing — matrix multiplication — billions of times simultaneously. Those two requirements are almost perfectly opposed.
AI Compute refers to the raw processing power required to train and run AI models. When a neural network processes an input, it performs enormous numbers of multiplications and additions across matrices of numbers representing the model's parameters. Training a large model means doing this across billions of parameters, over millions of examples, thousands of times. A CPU can handle this, in the same way a sedan can haul gravel. It will get there eventually. But it is not what the machine was built for.
GPU Acceleration is what changed the economics of deep learning. GPUs were originally designed for rendering graphics, which also requires massive parallel computation across matrices of pixel values. That architecture turned out to be nearly ideal for neural network training. Where a CPU might have a few dozen cores optimized for sequential tasks, a GPU has thousands of smaller cores designed to execute the same operation on many data points at once. For matrix multiplication, this is a decisive advantage. When a single GPU isn't enough, GPU Clusters link many GPUs together to distribute the workload across a network of machines.
Google took this further with the TPU Acceleration architecture. Tensor Processing Units are chips designed from scratch for the specific operations that neural networks require, rather than adapted from graphics hardware. They are faster and more power-efficient for AI workloads than general-purpose GPUs, though less flexible for other tasks. Like GPUs, they can be scaled into TPU Clusters for the largest training runs.
Beyond GPUs and TPUs, two other hardware categories are worth knowing. ASIC Acceleration refers to application-specific integrated circuits: chips designed for one task and nothing else. An ASIC for AI inference can be extraordinarily fast and efficient, because every transistor on the chip is dedicated to exactly the operations the model needs. The tradeoff is inflexibility; if the task changes, the chip may not be reusable. FPGA Acceleration sits between a general-purpose GPU and a fixed ASIC. Field-programmable gate arrays can be reconfigured after manufacture, which makes them useful for workloads that need hardware-level performance but may evolve over time.
The articles in this section cover each of these hardware categories in detail. Together they explain why the hardware layer is not a commodity decision in AI systems, and why the choice of compute infrastructure shapes everything from training cost to inference latency.
